VXI?Corporation F80 podręczniki

Vxi corporation F80 Dokumentacja (196 strony)

Marka: Vxi-corporation | Kategoria: Serwery | Rozmiar: 1.71 MB |

Angielski

Spis treści

PENTEK MODEL 6526

1

Copyrights

2

Trademarks

2

Manual Revision History

2

Warranty

2

Table of Contents

10

Chapter 1: Overview

11

1.6 Channel Formatters

12

1.4 Time Stamp Counter

12

1.5 Command Controller / DSP

12

1.7 RACEway Interface

13

1.8 Digital Interfaces

13

1.9 VMEbus Interface

13

1.10 Model 6526 Block Diagram

14

1.11 Specifications

15

2.1 Inspection

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Pin 1 – Pin 2* Disabled*

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Pin 2 – Pin 3 Enabled

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* Factory Default Setting

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2.4 Model 6526 Front Panel

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2.4.2 Sync Bus

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2.4.2.1 Sync Bus Connector

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2.4.2 Sync Bus (continued)

28

2.4.3 TMS320C31 Serial Port

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2.4.4 Reset Button

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CAUTION!!

33

3.1 Programming Overview

35

3.3 VMEbus Access

36

3.4 VMEbus A16 Slave Memory

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3.4.1.2 DSP Reset − Bit D1

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3.6.13.1 Lock Flag − Bit D0

86

3.6.13.2 Read Flag − Bit D1

86

3.7.1.1 Single Load − Bit D0

94

3.7.5 Command Set

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(continued)

100

3.8.1.1 BIST Fail − Bit D0

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3.8.1.2 DSP LED − Bit D9

103

Sync_Source bit SYNC

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B.1 Overview

133

B.2 RACEway ILK1

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B.3 RACEway ILK 4 Example

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B.4 RACEway ILK 8 Example

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B.5 RACEway ILK12 Example

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B.6 RACEway ILK16 Example

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Appendix C: Graychip 4014

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Rev.: A

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GRAYCHIP

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“NARROW*1.97”

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“NARROW*0.97 + 1"

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GC4014 DATASHEET

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3.0 FUNCTIONAL DESCRIPTION

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3.1 CONTROL INTERFACE

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READ CYCLE- RD HELD LOW

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WRITE CYCLE- RD

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HELD LOW

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3.3 THE DOWN CONVERTERS

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Figure 4. NCO Circuit

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Figure 5. Example NCO Spurs

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3.3.2 Four Stage CIC Filter

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3.3.3 Coarse Channel Gain

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(c) GSM Coefficients

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∞ to +24 dB in

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3.6 OUTPUT MODES

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3.6.2 Serial Outputs

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Table 2: TDM Modes

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3.6.3 Link Mode Output

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3.7 CLOCKING

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3.8 POWER DOWN MODES

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3.9 SYNCHRONIZATION

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3.10 DATA LATENCY

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3.11 DIAGNOSTICS

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Table 3: Latency

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4.0 PACKAGING

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GC4014-PQ

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QUAD RCVR

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MMMMMM LLL

159

GRAYCHIP YYWW

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5.0 CONTROL REGISTERS

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5.1 SYNC MODE REGISTER

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Table 4: Sync Modes

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5.2 DECIMATION MODE REGISTER

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5.3 CIC DECIMATION REGISTERS

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5.4 SCALE CONTROL REGISTER

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5.5 CHANNEL GAIN REGISTER

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5.6 OUTPUT FORMAT REGISTER

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5.7 OUTPUT MODE REGISTER

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5.8 BLANKING CONTROL REGISTER

165

5.10 COUNTER MODE REGISTERS

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5.11 TEST MODE REGISTER

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5.12 PAGE MAP REGISTER

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5.13 STATUS CONTROL REGISTER

168

5.14 CHECKSUM REGISTER

168

Table 5: Mask Revisions

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, suggested default = 0x80

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, suggested default = 0x5f

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6.4 DC CHARACTERISTICS

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6.5 AC CHARACTERISTICS

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GSM Blocker Requirements

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Table 11: GSM Conﬁguration

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DAMPS Blocker Requirements

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PFIR_SUM

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7.7 DIAGNOSTICS

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7.8 OUTPUT TEST CONFIGURATION

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SCALE 6 BIG_SCALE× 56–+()

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Appendix D: PitCREWjr

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Master Writes and Slave Reads

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Master Reads and Slave

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Figure 2

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Master Function

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Figure 4

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Figure 5

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Figures 6

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Figure 5. Master Read

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Figure 6. Slave Write

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Figure 8

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Figure 9

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Figure 10

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Figure 9. SRE Function

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Figure 10. Master Read Error

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